Domino logic

From Wikipedia, the free encyclopedia

Domino logic is a CMOS-based evolution of the dynamic logic techniques which were based on either PMOS or NMOS transistors. It allows a rail-to-rail logic swing.It was developed to speed up circuits.

In a cascade structure consisting of several stages, the evaluation of each stage ripples the next stage evaluation, similar to a domino falling one after the other. The structure is hence called Domino CMOS Logic.

Important features include:

  • 1. They have smaller areas than conventional CMOS logic.
  • 2. Parasitic capacitances are smaller so that higher operating speeds are possible.
  • 3. Operation is free of glitches as each gate can make only one transition.
  • 4. Only non-inverting structures are possible because of the presence of inverting buffer.
  • 5. Charge distribution may be a problem.

[edit] References

  • Abdel-Hafeez and Ranjan. "Single Rail Domino Logic For Four-Phase Clocking Scheme" [1]
  • Chung-Yu Wu; Kuo-Hsing Cheng; Jinn-Shyan Wan. "Analysis and design of a new race-free four-phase CMOS logic", Solid-State Circuits, IEEE Journal of Volume 28, Issue 1, Jan 1993 Page(s):18 - 25