DEC Firefly

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Firefly is a shared-memory multiprocessor workstation, created by DEC Systems Research Center. Its first version built contains up to seven MicroVAX 78032 processors. The cache from each of the processors keep a consistent view of the same main memory using a cache coherency algorithm. The second version of the Firefly contains faster CVAX 78034 processors.

Contents 1 Hardware description 1.1 Processors 1.2 Processor boards 1.3 Memory and cache 2 Benchmarks 3 Conclusions 4 See also 5 External links

[edit] Hardware description

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[edit] Processors

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[edit] Processor boards

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[edit] Memory and cache

The Firefly processors communicate with the main memory through individual caches and a dedicated bus named MBus. The following table shows some information about the two versions of the Firefly.

	MicroVAX Version	CVAX Version
memory size	4Mb to 16Mb	32Mb to 128Mb
memory access time	400ns	200ns
cache size	4096 four-byte lines	16384 four-byte lines
cache type	direct mapped	direct mapped

The Firefly_protocol is used to ensure cache coherence.

[edit] Benchmarks

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[edit] Conclusions

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[edit] See also

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[edit] External links

• [1]
• A Multiprocessor Workstation