Cray SV1
From Wikipedia, the free encyclopedia
The Cray SV1 was a vector processor supercomputer, first manufactured by the Cray Research division of Silicon Graphics in 1998. The SV1 has since been succeeded by the Cray X1 and X1E vector supercomputers. Like its predecessor, the Cray J90, the SV1 was manufactured with CMOS chips, which lowered the cost of the system, and allowed the computer to be air-cooled. The SV1 was backwards compatible with J90 and Y-MP software, and ran the same UNIX-derived UNICOS operating system. The SV1 used Cray floating point representation, not the IEEE 754 floating point format used on the Cray T3E and some Cray T90 systems.
Unlike earlier Cray designs, the SV1 included a vector cache. It also introduced a feature called multi-streaming, in which one processor from each of four processor boards work together to form a virtual processor with four times the performance. The SV1 processor was clocked at 300 MHz. Later variants of the SV1, the SV1e and SV1ex, ran at 500 MHz, the latter also having faster memory and support for the SSD-I Solid-State Storage Device. Systems could include up to 32 processors with up to 512 shared memory buses.
Multiple SV1 cabinets could be clustered together using the GigaRing I/O channel, which also provided connection to HIPPI, FDDI, ATM, Ethernet and SCSI devices for network, disk, and tape services. In theory, up to 32 nodes could be clustered together, offering up to one teraflop in theoretical peak performance.
[edit] External links
|
|||||||
