Template:CPU technologies
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CPU technologies
Architecture
Instruction Set Architecture
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RISC
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CISC
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EPIC
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VLIW
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OISC
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ZISC
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Harvard architecture
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Von Neumann architecture
Parallelism
Instruction pipelining
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Superscalar
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Out-of-order execution
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Register renaming
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Speculative execution
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Multithreading
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Multiprocessing
Components
ALU
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FPU
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Vector processor
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SIMD
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32-bit
/
64-bit
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Registers
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Cache
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ASIC
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FPGA
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DSP
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Microcontroller
·
ASIP
·
SoC
Power management
Dynamic frequency scaling
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Dynamic voltage scaling
·
Clock gating
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