Clock edge

From Wikipedia, the free encyclopedia

Wikipedia:Diagram needed
About this image

A diagram is needed in this article

In electronics, a clock edge is a transition in a clock signal from either low to high (0 to 1) or high to low (1 to 0). It is called an "edge" because the square wave which represents a clock has edges at those points.

A rising edge is the transition of a digital signal from low to high. It is also named positive edge. When a circuit is rising edge triggered, it becomes active when the clock signal goes from low to high, and ignores the high to low transition.

A falling edge is the high to low transition. It's also known as the negative edge. When a circuit is falling edge triggered, it becomes active when the clock signal goes from high to low, and ignores the low to high transition.

It should be noted that the terms front edge or leading edge, back edge or trailing edge describe the related position of edges in a clock cycle. A leading edge can be a falling edge.

[edit] See also


Languages