Chip scale package

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A chip scale package (CSP) (sometimes, chip-scale package with a hyphen) is a type of integrated circuit chip carrier.

In the beginning, CSP was the acronym for Chip Size Packaging. As only a few packages are chip size, the meaning of the acronym was adapted to Chip Scale Packaging. According to IPC’s standard J-STD-012, "Implementation of Flip Chip and Chip Scale Technology", in order to qualify as chip scale, the package must have an area no greater than 1.2 times that of the die and it must be a single-die, direct surface mountable package. Another criterion that is often applied to qualify these packages as CSPs is that their ball pitch should be no more than 1 mm.

The concept was first proposed by Junichi Kasai of Fujitsu and Gen Mukarami of Hitachi Cable. The first concept demonstration however came from Mitsubishi Electric.

The die may be mounted on an interposer upon which pads or balls are formed, as in flip chip ball grid array (BGA) packaging, or the pads may be etched or printed directly onto the silicon wafer, resulting in a package very close to the size of the silicon die: such a package is called a wafer level chip scale package (WL-CSP) or a wafer level package (WLP).

[edit] External links

• Chip Scale Package – Definition and general information, from SiliconFarEast.com
• Wafer-Level Packaging – From SiliconFarEast.com
• Chip Scale Review – A trade magazine
• Wikihowto: Guide to IC packages
• [[1]] The Nordic Electronics Packaging Guideline, Chapter D: Chip Scale Packaging