BMS-203

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CER-203: CPU testing
CER-203: CPU testing

BMS-203 is a central unit of early digital computer CER-203 developed by Mihajlo Pupin Institute (Serbia) in 1971. It contained both central processing unit and primary memory.

[edit] Specifications

Central Processing Unit:

  • Number of instructions: 32
  • Performance:
    • one 16-cycle instruction: 20 μs
    • one single cycle instruction: 5 μs
    • addition and/or subtraction of two 15-digit numbers: 20 μs

Primary memory:

  • Capacity: 8 kilowords
  • Speed (cycle time): 1 μs
  • Complete, autonomous memory error checking
  • Parity control

[edit] See also

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