Atmel AVR instruction set

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Here is the basic Atmel AVR instruction set.

Arithmetic operations work on registers R0-R31 but not directly on RAM and take one clock cycle, except for multiplication and word-wide addition (ADIW and SBIW) which take two cycles.

RAM and I/O space can be accessed only by copying to or from registers. Indirect access (including optional postincrement, predecrement or constant displacement) is possible through registers X, Y, and Z. All accesses to RAM takes two clock cycles. Moving between registers and I/O is one cycle. Moving eight-bit or sixteen-between registers or constant to register is also one cycle. Reading program memory (LPM) takes three cycles.

There are two types of conditional branches: jumps to address and skips. Conditional branches (BRxx) can test ALU flag and jump to specified address. Skips (SBxx) test arbitrary bit in registers or I/O and skip the next instruction if the test was true.

AVR instruction set
Arithmetic	Bit & Others	Transfer	Jump	Branch	Call
ADD Rd, Rr ADC Rd, Rr ADIW Rd+1:Rd, K6 SUB Rd, Rr SUBI Rd, K8 SBC Rd, Rr SBCI Rd, K8 SBIW Rd+1:Rd, K6 INC Rd DEC Rd AND Rd, Rr ANDI Rd, K8 OR Rd, Rr ORI Rd, K8 EOR Rd, Rr COM Rd NEG Rd CP Rd, Rr CPC Rd, Rr CPI Rd, K8 SWAP Rd LSR Rd ROR Rd ASR Rd MUL Rd, Rr MULS Rd, Rr MULSU Rd, Rr FMUL Rd, Rr FMULS Rd, Rr FMULSU Rd, Rr	BSET s BCLR s SBI A, b CBI A, b BST Rd, b BLD Rd, b NOP BREAK SLEEP WDR	MOV Rd, Rr MOVW Rd+1:Rd, Rr+1:Rr IN Rd, A OUT A, Rr PUSH Rr POP Rr LDI Rd, K8 LDS Rd, K16 LD Rd, X LD Rd, -X LD Rd, X+ LDD Rd, Y+K6 LD Rd, -Y LD Rd, Y+ LDD Rd, Z+K6 LD Rd, -Z LD Rd, Z+ STS K16, Rr ST X, Rr ST -X, Rr ST X+, Rr STD Y+K6, Rr ST -Y, Rr ST Y+, Rr STD Z+K6, Rr ST -Z, Rr ST Z+, Rr LPM LPM Rd, Z LPM Rd, Z+ ELPM ELPM Rd, Z ELPM Rd, Z+ SPM	RJMP K12 IJMP EIJMP JMP K22	CPSE Rd, Rr SBRC Rr, b SBRS Rr, b SBIC A, b SBIS A, b BRBC s, K7 BRBS s, K7	RCALL K12 ICALL EICALL CALL K22 RET RETI

[edit] Instruction set inheritance

Not all instructions are implemented in all AVR controllers. This is the case of the instructions performing multiplications, extended loads/jumps/calls, long jumps, and power control.

AVR Options

Family	Members	Arithmetic	Branches	Transfers	Bit-Wise
Minimal Core	At90s1200 Attiny10 Attiny11 Attiny12 Attiny15 Attiny28	ADD ADC SUB SUBI SBC SBCI AND ANDI OR ORI EOR COM NEG SBR CBR INC DEC TST CLR SER	RJMP, RCALL, RET, RETI, CPSE, CP, CPC, CPI, SBRC, SBRS, SBIC, SBIS, BRBS, BRBC, BREQ, BRNE, BRCS, BRCC, BRSH, BRLO, BRMI, BRPL, BRGE, BRLT, BRHS, BRHC, BRTS, BRTC, BRVS, BRVC, BRIE, BRID	LD ST MOV LDI IN OUT LPM	SBI, CBI, LSL, LSR, ROL, ROR, ASR, SWAP, BSET, BCLR, BST, BLD, SEC, CLC, SEN, CLN, SEZ, CLZ, SEI, CLI, SES, CLS, SEV, CLV, SET, CLT, SEH, CLH, NOP, SLEEP, WDR
Classic Core up to 8K Program Space	at90s2313 at90s2323 attiny22 at90s2333 at90s2343 at90s4414 at90s4433 at90s4434 at90s8515 at90c8534 at90s8535	+ ADIW, SBIW	+ IJMP, ICALL	+ LD (now 9 modes), LDD, LDS, ST (9 modes), STD, STS, PUSH, POP	(nothing new)
classic AVR core with up to 128K	atmega103, atmega603, at43usb320, at76c711	+ ???	+ ???	+ ???	+ ???
enhanced AVR core with up to 8K	atmega8, atmega83, atmega85	+ MUL, MULS, MULSU, FMUL, FMULS, FMULSU	+ JMP, CALL	+ MOVW, LPM (3 modes), SPM,	(nothing new)
enhanced AVR core with up to 128K	atmega16, atmega161, atmega163, atmega32, atmega323, atmega64, atmega128, at43usb355, at94k	(nothing new)	(nothing new)	(nothing new)	+ BREAK