AN/FSQ-32
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[edit] Description
The AN/FSQ-32 was a computer made by IBM (International Business Machines) in 1960 and 1961 for the United States Air Force Strategic Air Command (SAC). IBM called it the "4020". Only one Q-32 unit was built.[1]
[edit] Locations
The Q-32 was installed at System Development Corporation (SDC) headquarters, Santa Monica, California and was used as a development machine for the compiler and operational software for the AN/FSQ-31V, which was used as the Data Processing Element of the SAC Automated Command and Control System.
[edit] Architecture
The system was divided into functional sections:
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- Central Processing Unit
- Memory
- High-Speed Input/Output
- Low-Speed Input/Output
- Operations Console
[edit] Central Processing Unit
Memory was addressed by words, which were 48 bits long. Each word was divided into eight 6-bit bytes. A 6-bit byte, as opposed to the 8-bit byte in common use today, was common in IBM and other scientific computers of the time. The address space provided a maximum of 256K words.
The ISA was rather complicated for its time. The instructions were a fixed length of one word providing 24 bits for the operation and 24 bits for the address. The address consisted of 18 bits (3 bytes) for the memory address, with other bits used for the specification of index registers and indirect addressing.
The operation field provided the operation code and a variety of modifiers. Some modifiers allowed instructions to operate only on specific bytes of a word or on specific bits of a byte without separate masking operations. Other modifiers allowed the single 48-bit ALU to operate on a pair of 24-bit operands to facilitate vector operations.
Other parts of the CPU were some sense switches, which could be used to control various software functions, the run/halt switch, and a switch, amplifier, and speaker assembly, which could be used to provide audio feedback or even play music, by connecting one of four bits in the main accumulator which could then be toggled under software control at an appropriate rate to produce whatever tones one wanted.
[edit] Memory
The Q-32 waa equipped with 128kwords. The memory bank was oil and water cooled. Also considered as part of the memory subsystem in that they were addressed via fixed reserved memory addresses, were 4 48 position switch banks, in which a short program could be inserted, and a plug panel, similar to the one used in IBM Unit-Record equipment, that had the capacity of 32 words, so longer bootstrap or diagnostic programs could be installed in plug panels which could then be inserted into the receptacle and used. This served as a primitive ROM.
[edit] High-Speed Input/Output
The High-Speed I/O section provided interfaces to the Drum Memory system, which consisted of a control system, and two vertical drum memory devices. Each drum read and wrote 50 bits at a time in parallel so transferring data could be done quickly. The drums were organized as 17 fields with 8192 words per field for a total capacity of 139264 words. The motors that rotated the drums required 208 VAC at 45 Hz so a motor generator unit was required to change the frequency from 60 Hz. This added to the noise level in the computer room. The other connection to/from the HSIO was to the SACCS EDTCC, which then interfaced to the rest of the SACCS.
[edit] Low-Speed Input/Output
The Low-Speed I/O section interfaced to several different devices:
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- Communications Multiplexor
- Tape Controllers 1 and 2, connected to 16 IBM 729-V Tape Drives
- Disk File Controller, which was a modified Tape Controller, connected to
- IBM 1401, which controlled data transfers from unit-record equipment:
- 2 IBM Selectric Typewriters, (I/O Typewriters) one of which was used for operational messages and the other for diagnostic messages and maintenance activities.
[edit] References
- ^ Wohlman, John (1968). Computer-Generated Map Data. Air University Review. Retrieved on June 20, 2006.
