WDC 65C02
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The WDC 65C02 8-bit CPU is an upgraded CMOS version of the popular MOS Technology 6502 microprocessor, the redesign being made by Bill Mensch of the Western Design Center (WDC). The 65C02 was second-sourced by NCR, GTE, Rockwell, Synertek and Sanyo.
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[edit] Introduction
The W65C02S is a low power, cost effective 8-bit microprocessor. It is a fully static core which allows the primary clock (PHI2) to be slowed down indefinitely or fully stopped in either the high or low state. The variable length instruction set and manually optimized core size make the W65C02S an excellent choice for low power System-on-Chip (SoC) designs.
The Verilog RTL model is available for ASIC design flows. To aid in system development, WDC also provides a Development System that includes a W65C02DB Developer Board, an In-Circuit Emulator (ICE) and the W65CSDS Software Development System.
[edit] Features of the W65C02S
- 8-bit data bus
- 8-bit ALU, Accumulator, Stack Pointer, Index Registers, Processor Status Register
- 16-bit Program Counter
- 69 instructions
- 16 addressing modes
- 212 Operation Codes (OpCodes)
- Wide operating voltage range (Specified at 1.8, 2.5, 3.0, 3.3, 5.0 v +/- 5%)
- Low Power consumption, 150uA @ 1 MHz
- 16-bit address bus provides access to 65,536 bytes of memory space
- Vector Pull (VPB) output indicates when interrupt vectors are being addressed
- WAit-for-Interrupt (WAI) and SToP (STP) instructions reduce power consumption, decrease interrupt latency and enable synchronization with external events
- Variable length instruction set enables smaller code optimization over fixed length instruction set processors. This results in low power as well
- Fully static circuitry allows stopping the clock to conserve power
[edit] Comparison with the 6502
The 65C02 shared its predecessor's 8-bit instruction set architecture and 16-bit memory addressing, but added a number of improvements and documented opcodes (the most useful being instructions that could push or pull the .X and .Y index registers to/from the stack). In addition to the new stack manipulation opcodes, undefined opcodes were converted into NOPs (although of varying instruction lengths), and, significantly, the defective "indirect jump page wrap instruction" (JMP (<ADDR>), where <ADDR> straddles a memory page boundary) was fixed, eliminating a constant source of trouble for unwary assembly language programmers. This instruction was also enhanced with .X register indexing, making it possible to code JMP (<ADDR>,X), enabling the development of a simple jump table management methodology.
Another problem with the 6502, fixed in the 65C02, relates to its program status register, which contains eight system flags. Some flags are set or reset under program control. Others reflect the status of the machine after arithmetic or bit manipulation instructions. Here are the meanings of the status flags when set, starting with the most significant bit:
- N -- Result = Negative
- V -- Sign Bit Overflow
- 1 -- Undefined (always set)
- B -- Break flag (set by a BRK instruction)
- D -- BCD Mode Enabled
- I -- Interrupt Request (IRQ) Disabled
- Z -- Result = Zero
- C -- Arithmetic Carry or Borrow
In all NMOS forms of the 6502, the decimal flag (D) was not initialized to a known state following reset or when an interrupt was processed, and could lead to arbitrary behavior. This forced programmers to use the CLD instruction early in the reset handler code (it was generally the second instruction executed after SEI - IRQ disable), as well as in the front end of the interrupt handler. The 65C02 addressed these problems by causing the D flag to be cleared at reset or upon receipt of an interrupt (after the status register was pushed on to the stack.
Also, in the NMOS 6502, the N, V and Z flags were invalid when the processor was operating in BCD mode. The 65C02 fixed this problem (at the cost of additional processing cycle), and thus increased the usefulness of BCD mode.
Some variants of the 65C02 (including the W65C02S and the Rockwell R65C00 family) added individual bit manipulation operations (RMB, SMB, BBR and BBS). The 65SC02 was also available, which lacked these operations.
[edit] Notable uses of the 65C02
- Acorn Computers Ltd:
- BBC Master home computer (65C102)
- Apple Computer:
- Apple IIc portable computer
- Enhanced Apple IIe home computer
- Atari, Inc.:
- Atari Lynx handheld game console (65SC02)
- NEC Corporation
- PC Engine (TurboGrafx-16)
- Others:
- TurboMaster accelerator cartridge for the Commodore 64 (speedup from ~1 to ~4 MHz)
- Time Top Gameking handheld game consoles (6 MHz)
- Watara Supervision handheld game consoles (4 MHz)
- mephisto MMV chesscomputer (at 4–20 MHz)
[edit] External links
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MOS 4510 ● MOS 6501 ● MOS 6502 ● WDC 65C02 ● Hudson HuC6280 ● Ricoh 2A03 ● MOS 6507 ● MOS 6508 ● MOS 6509 |
