Image:TySETcharacteristics.png

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[edit] Summary

Current-voltage characteristics (IVC) of a single electron transistor (SET) showing maximum and minimum blockade (top left), and modulation curves for two different bias schemes. In R-bias (left bottom), the SET is biased from a voltage source via a high ohmic resistor, whose value determines the inclination of the trace in the IVC (the load line) as the gate voltage is varied. In V-bias (top right), the voltage across the SET is held constant by an operational amplifier setup (causing a vertical trace in the IVC), and the current is modulated with a periodicity in the gate voltage corresponding to a difference of one elementary charge induced on the gate.

Created by Torsten Henning and published in Charging effects in niobium nanostructures, PhD thesis, Mikroelektronik och Nanovetenskap, Chalmers Tekniska Högskola AB och Göteborgs Universitet, Göteborg 1999. Full text available online [1] as www.arxiv.org e-print cond-mat/9901308.

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