TriMedia

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TriMedia is a VLIW Mediaprocessor family from NXP Semiconductors (formerly Philips Semiconductors). TriMedia is a Harvard architecture CPU that features many DSP and SIMD operations to efficiently process audio and video data streams. For TriMedia processor optimal performance can be achieved by only programming in C/C++ as opposed to most other VLIW/DSP processors which require assembly language programming to achieve optimal performance. High-level programmability of TriMedia relies on the large uniform register file and the orthogonal instruction set, in which RISC-like operations can be scheduled independently of each other in the VLIW issue slots. Furthermore, TriMedia processors boast advanced caches supporting unaligned accesses without performance penalty, hardware and software data/instruction prefetch, allocate-on-write-miss, as well as collapsed load operations combining a traditional load with a 2-taps filter function. However, currently there is no hardware support for cache coherency to build larger shared memory multiprocessor systems based on TriMedia.

Main features of TriMedia

5 issue slots filled with up to 43 functional units
128 32-bit General Purpose Registers
SIMD & DSP operations
32-bit IEEE 754 floating point operations
8/16/32/64 KB Instruction cache, 8/16/32/64/128 KB Data cache
separate memory and peripheral bus interfaces
up to 8 built-in timers
up to 64 built-in vectored interrupts
supported by an ANSI compliant C/C++ compiler toolchain

[edit] History

The first TriMedia was created in 1987 under the name LIFE-1 VLIW processor by Gerrit Slavenburg and Junien Labrousse. For the next several years LIFE was further matured internally in Philips under guidance of Gerrit Slavenburg, which resulted in 1996 in the introduction of the first Trimedia product: the TM1000 PCI Media Processor. In 1998 the TM1100 and TM1300 (later re-named to PNX1300) products were introduced.

In 2000 Philips spun out its TriMedia business to TriMedia Technologies Inc. (TTI) which was a pure IP vendor. TTI tried unsuccessfully to create a 64 bit next generation TriMedia CPU architecture. In hindsight the timing for this venture couldn't have been worse as it was right at the start of the Dot-com recession. In 2003 what was left of TTI was re-absorbed within Philips.

In 2002 the TM3260 CPU was released in the PNX1500 Media Processor SoC. This CPU was the first of a family of modular Trimedia CPU cores with standardized interfaces that can easily be integrated inside Audio/Video SoC's. The TM3260 has found use in other NXP products, e.g. the PNX8550 Home Entertainment Engine. In 2004 the super pipelined TM5250 CPU core was announced and won the Best Media Processor award from Microprocessor Report. This processor was made available in the PNX1700 Media Processor SoC. These two CPU cores were architected by Jan-Willem van de Waerdt in close cooperation with Gerrit Slavenburg.

In 2005 the TM3270 was announced as a low-power H.264 capable incarnation of the TriMedia architecture (see external links to papers below), first released in the PNX4103 SoC.

In 2006 Philips Semiconductors as a whole was spun off from Philips and was renamed to NXP in which the TriMedia architecture continues to thrive under the guidance of Jan-Willem van de Waerdt.

[edit] The Cores

Core	year 1st silicon	ISA	Features	Cache (I/D) KB	frequency (worst case)	introduction technology
TM1000	1997	TMA0		32/16	100 MHz	500 nm
TM1100	1998	TMA1		32/16	133 MHz	350 nm
TM1300	1999	TMA1		32/16	166 MHz	250 nm
TM3260	2002	TMA2	binary compatible with TM1300	64/16	250 MHz	130 nm
TM5250	2004	TMA3	128Kb L2 data cache, allocate on write miss, hardware prefetching, super pipelined (high speed)	64/16	450 MHz	130 nm
TM2270	2006	TMA3	96 GPRs (small area)	32/16	290 MHz	90 nm
TM3270/1	2006	TMA4 + ASE	low power	64/128 64/32 32/16	350 MHz	90 nm

The TriMedia cores are typically used in home, mobile and automotive products. They are used as deeply embedded CPUs in SoCs as well as general purpose DSPs.