Peripheral Component Interconnect

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This article is about computer bus type. For other uses of PCI, see PCI.

PCI Peripheral Component Interconnect
five 32-bit PCI expansion slots on a motherboard
Year Created:	Mid-1993
Created By:	Intel
Superseded By:	PCI Express (2004)

Width:	32 bits
Number of Devices:	1 per slot
Speed:	133 MB/s
Style:	Parallel
Hotplugging?	no
External?	no

64-bit PCI expansion slots inside a Power Macintosh G4

The Peripheral Component Interconnect, or PCI Standard (in practice almost always shortened to PCI) specifies a computer bus for attaching peripheral devices to a computer motherboard. These devices can take any one of the following forms:

An integrated circuit fitted onto the motherboard itself, called a planar device in the PCI specification.
An expansion card that fits into a socket.

The PCI bus is common in modern PCs, where it has displaced ISA and VESA Local Bus as the standard expansion bus, but it also appears in many other computer types. The bus will eventually be succeeded by PCI Express, which is standard in most new computers, and other technologies.

The PCI specification covers the physical size of the bus (including wire spacing), electrical characteristics, bus timing, and protocols. The specification can be purchased from the PCI Special Interest Group (PCISIG).

1 History
2 Interrupts
3 Conventional hardware specifications
4 Variants
- 4.1 Conventional
5 Card's physical size
- 5.1 Half-length extension card
6 See also
7 External links

[edit] History

Work on PCI began at Intel's Architecture Lab circa 1990. PCI 1.0, which was merely a component-level specification, was released on June 22, 1992. PCI 2.0, which was the first to establish standards for the connector and motherboard slot, was released on April 30, 1993. PCI 2.1 was released on June 1, 1995.

PCI was immediately put to use in servers, replacing MCA and EISA as the server expansion bus of choice. In mainstream PCs, PCI was slower to replace VESA Local Bus (VLB), and did not gain significant market penetration until late 1994 in second-generation Pentium PCs. By 1996 VLB was all but extinct, and manufacturers had adopted PCI even for 486 computers. EISA continued to be used alongside PCI through 2000. Apple Computer adopted PCI for professional Power Macintosh computers (replacing NuBus) in mid-1995, and the consumer Performa product line (replacing LC PDS) in mid-1996.

Later revisions of PCI added new features and performance improvements, including a 66 MHz 3.3 V standard and 133 MHz PCI-X, and the adaptation of PCI signaling to other form factors. Both PCI-X 1.0b and PCI-X 2.0 are backward compatible with some PCI standards. With the introduction of the serial PCI Express standard in 2004, motherboard manufacturers have included progressively fewer PCI expansion slots in favor of the new standard. Although it is still common to see both interfaces implemented side-by-side, traditional PCI is likely to slowly die out in coming years.

The system firmware examines each device's PCI Configuration Space and allocates resources. Each device can request up to six areas of memory space or I/O port space.

They can also have an optional ROM that can contain executable x86 or PA-RISC code, Open Firmware or an EFI driver.

In a typical system, the operating system queries all PCI buses at startup time to find out what devices are present and what system resources (memory, interrupt lines, etc.) each needs. It then allocates the resources and tells each device what its allocation is.

The PCI configuration space also contains a small amount of device type information, which helps an operating system choose device drivers for it, or at least to have a dialogue with a user about the system configuration. Part of this information is a human readable text description of the device.

[edit] Interrupts

Devices are required to follow a protocol so that the interrupt lines can be shared. The PCI bus includes four interrupt lines, all of which are available to each device. However, they are not wired in parallel as are the other traces. The positions of the interrupt lines rotate between slots, so what appears to one device as the INTA# line is INTB# to the next and INTC# to the next. Single-function devices always use their INTA# for interrupt signaling, so the device load is spread fairly evenly across the four available interrupt lines. This alleviates a common problem with sharing interrupts.

PCI bridges (between two PCI buses) map the four interrupt traces on each of their sides in varying ways. Some bridges use a fixed mapping, and in others it is configurable. In the general case, software cannot determine which interrupt line a device's INTA# pin is connected to across a bridge. The mapping of PCI interrupt lines onto system interrupt lines, through the PCI host bridge, is similarly implementation-dependent. The result is that it can be impossible to determine how a PCI device's interrupts will appear to software. Platform-specific BIOS code is meant to know this, and set a field in each device's configuration space indicating which IRQ it is connected to, but this process is not reliable.

PCI interrupt lines are level-triggered. This was chosen over edge-triggering in order to gain an advantage when servicing a shared interrupt line, and for robustness: edge triggered interrupts are easy to miss. However, this efficiency gain comes at the cost of flexibility, and one interrupting device can block all other devices on the same interrupt line. (See "level-triggered interrupt" for explanation.)

Later revisions of the PCI specification add support for message-signalled interrupts. In this system a device signals its need for service by performing a memory write, rather than by asserting a dedicated line. This alleviates the problem of scarcity of interrupt lines. Even if interrupt vectors are still shared, it does not suffer the sharing problems of level-triggered interrupts. It also resolves the routing problem, because the memory write is not unpredictably modified between device and host. Finally, because the message signaling is in-band, it resolves some synchronisation problems that can occur with posted writes and out-of-band interrupt lines.

PCI Express does not have physical interrupt lines at all. It uses message-signalled interrupts exclusively.

[edit] Conventional hardware specifications

A typical 32-bit PCI card, in this case a SCSI adapter from Adaptec

A PCI-X Gigabit Ethernet expansion card

These specifications represent the most common version of PCI used in normal PCs.

33.33 MHz clock with synchronous transfers
peak transfer rate of 133 MB per second for 32-bit bus width (33.33 MHz × 32 bits × (1 byte ÷ 8 bits) = 133 MB/s)
32-bit or 64-bit bus width
32-bit address space (4 gigabytes)
32-bit port space (now deprecated)
256-byte configuration space
5-volt signaling
reflected-wave switching

[edit] Variants

[edit] Conventional

Later versions of PCI allow (and in the latest versions require) 3.3V slots (keyed differently) on motherboards and allow for cards that are either double keyed for both voltages or even 3.3V only.

PCI 2.2 allows for 66 MHz signalling (requires 3.3 volt signalling) (peak transfer rate of 533 MB/s)
PCI 2.3 permits use of 3.3 volt and universal keying, but does not allow 5 volt keyed add in cards.
PCI 3.0 is the final official standard of the bus, completely removing 5-volt capability.
PCI-X doubles the width to 64-bit, revises the protocol, and increases the maximum signaling frequency to 133 MHz (peak transfer rate of 1014 MB/s)
PCI-X 2.0 permits a 266 MHz rate (peak transfer rate of 2035 MB/s) and also 533 MHz rate, expands the configuration space to 4096 bytes, adds a 16-bit bus variant and allows for 1.5 volt signaling
Mini PCI is a new form factor of PCI 2.2 for use mainly inside laptops
CardBus is a PCMCIA form factor for 32-bit, 33 MHz PCI
CompactPCI, uses Eurocard-sized modules plugged into a PCI backplane.
PC/104-Plus is an industrial bus that uses the PCI signal lines with different connectors.

[edit] Card's physical size

A full-size PCI card has a height of 107 mm (4.2 inches) and a depth of 312 mm (12.283 inches).

The height includes the edge card connector.

In addition to these dimensions the physical size and location of a card's backplate are also standardized. The backplate is the part that fastens to the card cage to stabilize the card and also contains external connectors, so it usually attaches in a window so it is accessible from outside the computer case.

A PCI card can be any smaller size, but the backplate must still be full-size and properly located so that the card fits in any standard PCI slot. Although some OEM's have used a different size such as Dell on certain models.^{[citation needed]}

Many computers have slots for PCI cards but do not have the space for full-size PCI cards. In some computers, some slots accommodate full-size PCI cards, while others do not because some part of the computer interferes.

"Half-height" and "half-length" cards and slots are common, and presumably have dimensions half those of the full-size cards. Other cards with reduced height are called "low profile" or "slim."

There is at least one reduced size variation on the backplate and there are very compact card cages that require that variation. It is not common.