Image:Mux from 3 state buffers.png

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[edit] Summary

This is a mux realized from 3-state buffers and AND gates. "Sel1" and "Sel2" are the control inputs (selection inputs). Note that Sel1 is sometimes called "more significant" than Sel2 is "less significant". If there were more control inputs, then Sel3 would be written to the right of "Sel2" and be even less "significant", etc.

Note that the subscripts on the I_n inputs indicate the decimal value of the binary control inputs at which that input is let through.

The labels 00, 01, 10, and 11 show what the turn on code is for the and gate and the 3-state buffer it connects to.

[edit] Licensing

I, the creator of this work, hereby grant the permission to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.
Subject to disclaimers.

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(del) (cur) 21:23, 15 April 2006 . . Fresheneesz (Talk | contribs) . . 490×752 (19,143 bytes) (fixing)
(del) (rev) 21:17, 15 April 2006 . . Fresheneesz (Talk | contribs) . . 463×743 (10,715 bytes) (This is a mux realized from 3-state buffers and AND gates. "Sel1" and "Sel2" are the control inputs (selection inputs). Note that Sel1 is sometimes called "more significant" than Sel2 is "less significant". If there were more control inputs, then Sel3 wou)