MDSP
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MDSP is a multiprocessor DSP family from Cradle Technologies.
It is a loosely coupled multiprocessor DSP chip that employs a compute and IO sub systems with programmable (software defined) IO, consisting of general purpose and signal processing cores. The general purpose cores are used for control and IO processing and the DSP cores for fixed or floating point computation.
Currently used mostly in streaming video processing in broadcast (internet and terrestrial) and video surveillance security markets.
Currently one of the most powerful dsp chips available. (Cradle claims the most powerful currently available).
MDSP is similar in architecture to the Cell (microprocessor) processor from STI (Sony , Toshiba and IBM) except it has multiple processing elements instead of just one like Cell. Cell's PE is powerpc based where as MDSP is not.
Current MDSP chips are capable of encoding 16 channels of MPEG-4 Level 3 or 1 channel of H.264/MPEG-4 AVC D1 (D1 Resolution − 720X480 @ 30 fps (NTSC) − 720X576 @ 25 fps (PAL).
The PE (processing element) or GPP (General purpose processor) units are a 32 bit general purpose risc like cores coupled with signal processing units (DSP or DSE) via a databus.
[edit] Development tools
Initial Software Development kit (sdk4) was based on cygwin 1.3.x and Cradles umgcc (gcc port). Sdk5 is based on cygwin 1.5.x and cragcc (gcc port).
The chips are programmed in a mix of C and clasm - C like assembly. The PEs can be programmed in C, the DSEs and MTEs are programmed in clasm.
The programmer has to manage resource allocation using semaphores, paying special attention to keeping all DSP units feed with instructions.
