Interleaved memory

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Memory is divided into set of banks in interleaved memory. It is a technique for compensating the relatively slow speed of DRAM. CPU can access alternative sections immediately without waiting for memory to be cached.

An interleaved memory with "n" banks is said to be n-way interleaved. If there are "n" banks, memory location "i" would reside in bank number i mod n.

Multiple memory banks take turns supplying data.