Talk:Instructions per second
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Removed Pentium 4 data for error. Pentium 4s typically have MIPS between 3,000 and 20,000, depending on year of release.
Also removed data based on erroneous formula.
Added Year 2004 data for budget 32 bit and 64 bit PCs.
- Is that right about 20,000 MIPS for the Pentium and 10,000 for the Celeron? Can they really do several instructions per clock tick? Bubba73 19:15, 12 Jun 2005 (UTC)
- Theoretically yes. Starting from the 486 which is a 386CPU and 387FPU on the same die, most processors can theoretically do more than 1 instruction per cycle. Note that cycle does not equal clock.
- Ever since the first Pentium processor they have been superscalar, which means they can perform more than one instruction per clock. Now for some modern MIPS calculations: the K7 and K8 (Athlon and Althon 64 from AMD) have 3 integer units each and can issue 3 insructions per clock, and can complete most non-memory integer operations in a single clock. The fastest single-core Athlon 64 is 2.8GHz, which gives a theoretical limit of 2.8e9 * 3 / 1e6 = 8400 MIPS. The Intel Pentium 4 has 2 simple integer units and one complex unit. It can perform a select subset of simple integer operations (add,subtract, and shifts on the Prescott) at a rate of 4 instructions per clock, or a single less simple operation. The fastest single-core Pentium 4 is 3.8GHz, which gives a peak of 15200 MIPS if you are doing the 4 instructions per clock, or down to 3800 MIPS for less-simple instructions. None of this includes things you can do with the SIMD instructions. Given the ambiguity in the Pentium calculations I'll just start by adding the Athlon 64 to give an idea of current speed of modern processors.
- According to SySoft SANDRA Dhrystone ALU benchmark, an Athlon FX-57 clocked at 2.8GHz yield 12000 MIPS, an Athlon 64 X2 3800+ with two cores at 2GHz yield 17200 MIPS, using the same benchmark, I reached 25150 MIPS by overclocking my Athlon 64 X2 3800+ to 2.8GHz. I took the liberty to edit the Athlon 64 MIPS accordingly, if you don't beleive me, 'bench 'em yourself.
- MIPS is now largely replaced by MTOPS which manufacturers are required to disclose by law. (United States Department of Commerce Export Administration Regulations 15 CFR 774 (Advisory Note 4 for Category 4). )
- Links to MTOP calculations : [[1]]
[[2]]
[edit] Timeline
- Aren't timelines usually in chronological order? Shogun 01:07, 21 March 2006 (UTC)
- yep, they are. I corrected the table. jidan 15:56, 15 May 2006 (UTC)
[edit] New proposed timeline
Hi, instead modifying the table inside the article, I write here the new proposed timeline based on http://www.frc.ri.cmu.edu/users/hpm/book97/ch3/processor.list.txt. However the last entries with the processor name only (from Intel pentium pro) should be removed/changed, because I think that is more realistic to calculate the IPS for the enteire system (CPU/bus/memory) and not only the processor. I also found very useful the cost of the system compared to the value of USD in the 1997, to understand the customer target. The sources are various (specint, speedmark, winsscore..) compared to the MIPS. May be not perfect, but I think it is a good point to start. Please to leave some comment. --Trek00 02:54, 5 February 2007 (UTC)
| Processor | IPS | Year | Cost (USD 1997) |
|---|---|---|---|
| Pencil and Paper | 0.0119 IPS | 1892 | |
| ENIAC | 2.89 kIPS | 1946 | 600'000 |
| UNIVAC I | 5.75 kIPS | 1951 | 930'000 |
| Whirlwind | 69.4 kIPS | 1955 | 200'000 |
| Atlas | 1.4 MIPS | 1961 | 5'000'000 |
| CDC 6600 | 8.76 MIPS | 1964 | 5'000'000 |
| CDC 7600 | 25.7 MIPS | 1969 | 10'000'000 |
| IBM System/370-195 | 17.3 MIPS | 1972 | 8'000'000 |
| Altair 8800 (Intel 8080 at 2 MHz) | 10 kIPS | 1974 | 500 |
| Cray 1 | 150 MIPS | 1976 | 10'000'000 |
| VAX 11/780 | 1 MIPS | 1977 | 200'000 |
| Apple II | 20 kIPS | 1977 | 1'300 |
| Commodore 64 | 200 kIPS | 1982 | 500 |
| Macintosh 128K (Motorola 68000 at 8 MHz) | 520 kIPS | 1984 | 2'500 |
| Cray 2 | 824 MIPS | 1985 | 10'000'000 |
| Macintosh II (Motorola 68020) | 2.5 MIPS | 1987 | 3'000 |
| PC Brand 386/25 (Intel 386DX at 25 MHz) | 4.3 MIPS | 1988 | 2'450 |
| Amiga 3000 (Motorola 68030) | 12.5 MIPS | 1990 | 3'300 |
| Gateway 486DX2/66 (Intel 486DX at 66 MHz) | 30.9 MIPS | 1991 | 3'900 |
| Power Macintosh 7100/66 (PowerPC 601 at 66 MHz) | 100 MIPS | 1994 | 2'899 |
| ARM 7500FE | 35.9 MIPS at 40 MHz | 1996 | |
| Gateway G6-200 (Intel Pentium Pro at 200 MHz) | 350 MIPS | 1997 | 2'949 |
| Power Macintosh G3 (PowerPC G3 at 266 MHz) | 500 MIPS | 1997 | 2'000 |
| Zilog eZ80 | 80 MIPS at 50 MHz | 1999 | |
| Intel Pentium III at 500 MHz | 820 MIPS | 1999 | 2'500 |
| Power Macintosh G4 (PowerPC G4 at 450 MHz) | 856 MIPS | 1999 | 2'500 |
| ASCI White | 10000000 MIPS | 2000 | 110'000'000 |
| AMD Athlon | 3561 MIPS at 1.2 GHz | 2000 | |
| AMD Athlon XP 2400+ | 5935 MIPS at 2.0 GHz | 2002 | |
| Pentium 4 Extreme Edition | 9726 MIPS at 3.2 GHz | 2003 | |
| System X | 20000000 MIPS | 2004 | 6'000'000 |
| ARM Cortex A8 | 2000 MIPS at 1.0 GHz | 2005 | |
| Xbox360 IBM "Xenon" Triple Core | 6400 MIPS at 3.2 GHz | 2005 | |
| IBM Cell All SPEs | 12096 MIPS at 3.2 GHz | 2006 | |
| AMD Athlon FX-57 | 12000 MIPS at 2.8 GHz | 2005 | |
| AMD Athlon 64 3800+ X2 (Dual Core) | 14564 MIPS at 2.0 GHz | 2005 | |
| AMD Athlon FX-60 (Dual Core) | 18938 MIPS at 2.6 GHz | 2006 | |
| Intel Core 2 X6800 | 27079 MIPS at 2.93 GHz | 2006 | |
| IBM Cell BE (All the SPEs) | 25600 MIPS (FLOPS) at 3.2 GHz | 2006 | |
| Intel Core 2 Extreme QX6700 | 57063 MIPS at 3.33 GHz | 2006 |
[edit] Cell Data is blatantly incorrect
Guys -- The data you posted about the Cell processor is just plain incorrect. Please update the page. For the record:
Cell runs at 3.2 GHz. Cell has one dual-threaded fully 64-bit Power Architecture core. This core, not including its AltiVec vector processor, does 6400 MIPS... although these are 64-bit instructions so the comparison to 32-bit processors is really not too valid. (Should we claim that it's 12800 "32-bit MIP equivalents"?) In ADDITION to the above, the Cell has 8 single-threaded 128-bit processor cores. That adds 25600 MIPS or 102400 32-bit MIP equivalents... for a total of 38400 (115200).
FLOPS have nothing to do with the above. In FLOPS, the Cell does over 200 single-precision GFLOPS and in the high teens in double precision. As of today (30 Mar 2007), information on the next-generation processor has been released... although I am not at liberty to disclose its performance until someone cites it.
The figure you cited was not a peak value (as cited for other processors). Instead, you took the performance on a given benchmark (Linpack) in FLOPS... which are not comparable to MIPS.
The Cell Team at IBM
