HP 3000

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The HP 3000 series is a family of minicomputers released by Hewlett-Packard in 1973 after a difficult development project. The first models were withdrawn from the market until speed improvements could be made. It was intended to be the first minicomputer delivered with a full featured operating system with timesharing. It ultimately became known as a reliable and powerful business system. Early models had large cabinets with front panels, later models were made that fit into desks using only terminal consoles for diagnostics, with bootstrap routines in ROM.

It was one of the last proprietary minicomputer systems to be retired, outlasting the PDP-11-descended Digital Equipment Corporation VAX, which was acquired by Compaq and then ultimately by Hewlett Packard. After 30 years, a five year phase-out period for the now-named e3000 series servers was announced in November 2001. No more new e3000s are being sold, though support for migration continues through Dec 31, 2008.

1 Classic Memory Segments and 64K Barrier
2 Classic and PA-RISC XL
3 Use of stack instead of registers
4 References
5 External links
6 Pictures
7 See also

[edit] Classic Memory Segments and 64K Barrier

Code and data reside in variable-length segments, code, read-only, reentrant and limited to 32,760 bytes and data to 65,528 bytes. MPE loads code segments from program files and segmented Library (SL) files as needed, up to 256 segments in one process.

There could be as much as 32k of memory in a code segment, but calling a routine was based on segment number and routine number within a segment, so a program could theoretically have 64k routines. This was compared to most 16 bit computers that had 64k of address space for everything. The bigger limitation was the data segment and stack segment, which were also 64k. Shared library routines did not permit static or global data since each process had its own data segment. The AGL graphic library got around this by requiring the caller to pass in an array from his own stack or data segment to hold all state information, similar to modern object oriented languages where methods are applied to objects passed in allocated by the caller.

Systems programming was done in SPL, an ALGOL-like language, but allowing inline assembler, and other direct access to the ISA. The standard terminals for the HP 3000 were the HP 2640 series, which supported block mode data entry from forms, as well as character mode.

[edit] Classic and PA-RISC XL

The HP 3000 family was divided into the "Classic" (16-bit) and "XL" (later IX - 32-bit) families following the introduction of systems based on HP's PA-RISC chips in early 1984. These were not binary compatible, but would run old code at a slower rate, or run recompiled code faster. The earlier "Classic" machines were based on a custom CISC processor. From about 1988 HP 3000s using PA-RISC processors began shipping in volume and, by 1995, effectively displaced the older family of machines from use although, as with all technology shifts, there remained a significant residue of older machines in service.

The 3000 series operating system was originally styled the Multi-Programming Executive, MPE (later called MPE-XL and then, after POSIX compliance was added in versions 5.0-5.5, MPE-IX). Early versions had a fairly primitive command line interpreter, without a hierarchical file system, and utilities such as compilers would resemble "run fortran.pub.sys" rather than allowing programs to be run as keyword commands. People who used the HP 3000 would notice that machines were faily reliable compared to other minicomputers of the time.

Part of the tremendous success of the HP 3000 was due to the provision of, with brief exceptions included as part of the Fundamental Operating System (FOS), a vendor developed shallow network database management system (DBMS) called Image (now called TurboIMAGE) that was reputedly inspired (if not actually based upon) the TOTAL DBMS developed by Cincom Systems, Inc. Almost uniquely in computer history, it remains a feature of MPE that forward binary compatibility of executable programs is preserved across all systems and all version of the operating system, regardless of hardware architecture. Programs that ran on the original series II in 1973 can be reloaded from tape onto the last N-Series machines produced in 2003 and run today without recompiling.

As the market shifted towards standardized Unix systems, which HP had also been promoting, in November 2001, Hewlett-Packard announced that the official End Of Life EOL for the HP3000 would be the end of 2006, and that no new systems would be sold after 2003. In early 2006, Hewlett-Packard announced that limited vendor support for the HP3000 would be extended by two years for certain clients or geographic regions. This is one of the longest lifetimes for a proprietary minicomputer system. The computers would outlast the highly regarded PDP-11 and VAX series, although OpenVMS operating system continued to be offered on Alpha-based systems and continues to be offered on IA-64-based systems as Hewlett Packard products.

[edit] Use of stack instead of registers

Most current computer instruction sets are based on a general purpose register model. The processor and memory architecture of the classic HP 3000 were based on a stack machine model. It was said to be inspired by the famous stack-based Burroughs large systems. Rather than having a small number of registers, for example only an AX and BX register in the case of the HP 1000, operands would be pushed on the same stack used to store local variables and return addresses. So rather than

LOAD AX, 0X0001
LOAD BX, 0X0002
ADD AX, BX

you would have

PUSH 0X0001
PUSH 0X0002
ADD

Call instructions enforce a fixed number of arguments, which would have made Corporate Computer Systems CSC/C and Unison's C/3000 C compiler implementations challenging.

The 16-bit microcoded machines (Series I, II, III, 30, 33, 39, 40, 42, 44, 48, 52, 58, 64, 68, 70, 37, ...) implement a 16-bit word addressed, byte-addressable, segmented, Harvard, Stack Instruction Set Architecture (ISA). Most of the ~214 instructions are 16 bits wide. Stack operations pack 2 per 16-bit word and the remaining few are 32 bits wide.

CISC Implementations

III: 4 Top of stack registers, 175nS microinstruction cycle time → 5.7 MHz
30, 33: Silicon on sapphire, 2 Top of stack registers, 90nS microinstruction cycle time → 11 MHz, instructions take 3-7 cycles
40, 42, 44, 48: Schottky TTL, 4 Top of stack registers, 105nS microinstruction cycle time → 9.5 MHz
64, 68: ECL, 8 Top of Stack registers, 75nS microinstruction cycle time → 13 MHz, 8kB cache, 60kb WCS, 2 16-bit ALUs
37: ~8000 gate CMOS Gate array, 4 Top of Stack registers

Later 32-bit models used HP's PA-RISC general register-based RISC architecture.

PA-RISC Implementations

PA-RISC 1.0 Series 925, 930, 935, 949, 950, 955, 960, 980
PA-RISC 1.1 Series 917, 920, 922, 927, 937, 947, 948, 957, 958, 967, 977sx, 987, 990, 991, 992, 995
PA-RISC 2.0 Series 918, 928, 968, 978, 988, 996, A and N class.