Generic Address Generator
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The Generic Address Generator (GAG) is a generalization of the direct memory access (DMA) method for the transfer of blocks of data or of data streams between memory and processing resource without the need to individually address each data item by a CPU instruction. One of the first detailed descriptions of the GAG methodology and principles has been published by the Ph. D. thesis of Alexander Hirschbiel in 1991. The GAG is a reconfigurable address generator. At run time after having been configured for a particular addressing pattern, the GAG does not need any memory cycles (except for fetching or storing the data item), even for highly complex address computations. Depending on the application, using a GAG instead of the addressing features of a classical CPU can yield speed-up factors of one order of magnitude or more. The GAG has been introduced as an important part of the Xputer methodology. The GAG is also an important part of Auto-sequencing memory (ASM) blocks like, for instance, for efficiently generating data streams in Reconfigurable Computing systems.
[edit] Further reading
- 1990: A. Hirschbiel et al.: A Novel Paradigm of Parallel Computation and its Use to Implement Simple High Performance Hardware; Proc. InfoJapan'90, Tokyo, Japan, 1990
- 1991 see above: Invited reprint in: Future Generation Computer Systems 7 91/92, North Holland Publ. Co.
- 1991 Alexander Hirschbiel: A Novel Processor Architecture Based on Auto DataSequencing and Low Level Parallelism; Ph. D. Dissertation, 1991, Kaiserslautern University of Technology
- 1998 J. Becker, K. Schmidt et al.: Automatic Parallelism Exploitation for FPL-based Accelerators; Proc. Hawaii Int'l. Conf. on System Sciences (HICSS'98), Big Island, Hawaii,1998
- 2002 M. Herz et al. (invited paper): Memory Organization for Data-Stream-based Reconfigurable Computing; Proc. IEEE ICECS 2002, Dubrovnik, Croatia, 2002
