Futurebus
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Futurebus (IEEE 896) is a computer bus standard, intended to replace all local bus connections in a computer, including the CPU, memory, plug-in cards and even, to some extent, LAN links between machines. The effort started in 1979 and didn't complete until 1987, and then immediately went into a redesign that lasted until 1994. By this point everyone involved lost interest, and Futurebus saw little use.
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[edit] History
The original in the late 1970s, VMEBus was faster than the parts plugged into it. it was quite reasonable to connect a CPU and RAM to VME on separate cards to build a computer. However as the speed of the CPUs and RAM rapidly increased, VME was quickly overwhelmed. Increasing the speed of VME was not easy, because all of the parts plugged into it would have to be able to support these faster speeds as well.
Futurebus looked to fix these problems and create a successor to systems like VMEbus with a system that could grow in speed without effecting existing devices. In order to do this the primary technology of Futurebus was built using asynchronous links, allowing the devices plugged into it to talk at whatever speed they could. Another problem that needed to be addressed was the ability to have several cards in the system as "masters", allowing Futurebus to build multiprocessor machines. This required some form of "distributed arbitration" to allow the various cards gain access to the bus from any point, as opposed to VME which put a single master in slot 0 with overall control. In order to have a clear performance benefit, Futurebus was designed to have the performance needed ten years in the future.
Typical IEEE standards start with a company building a device, and then submitting it to the IEEE for the standardization effort. In the case of Futurebus this was reversed, the whole system was being designed as during the standardization effort. This proved to be its downfall. As companies came to see Futurebus as the system, they all joined in. Soon the standards meetings had hundreds of people attending, all of them demanding that their particular needs and wants be included. As the complexity grew, the standards process slowed. In the end it took eight long years before the specification was finally agreed on in 1987.
That was just in time for the US Navy who had been looking for a new high-speed system for passing sonar data around in their newly designed Seawolf class submarines, and they said they would standardize on Futurebus if only a few more changes would be made. Seeing a potential massive government buy, the additions effort started immediately on Futurebus+. This also had the unexpected side effect of killing any effort to produce Futurebus system while everyone waited for the new version to come out, "real soon now". Real soon turned out to be another four years, and when the resulting Futurebus+ was released, no one was interested any longer.
In the end very little use of Futurebus was attempted. The decade-long performance gap they gave the system had evaporated in the decade-long standards process, and conventional local bus systems like PCI were close in performance terms. Meanwhile the VME ecosystem had evolved to such a degree that it continues to be used today, another decade on. The Futurebus technology is currently used as an internal backplane technology for systems such as routers.
However the Futurebus effort did act as a catalyst for change in other ways. After the 1987 version shipped and the Futurebus+ effort started, a number of the original designers realized the effort was doomed. One member did a quick back-of-the-envelope calculation and showed that by the time Futurebus+ shipped, it would already be too slow for the supercomputer market. A group then organized to create a system aimed directly at this need, which eventually led to Scalable Coherent Interconnect. Meanwhile another member decided to simple re-create the entire concept on a much simpler basis, which resulted in QuickRing. Due to the simplicity of these standards, both standards were completed before Futurebus+.
[edit] Description
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One of the most elegant features of the Futurebus design is its distributed bus arbitration mechanism.
