Double data rate

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In computing, a computer bus operating with double data rate transfers data on both the rising and falling edges of the clock signal, effectively nearly doubling the data transmission rate without having to deal with the additional problems of timing skew that increasing the number of data lines would introduce. This is also known as double pumped, dual-pumped, and double transition.

This technique has been used for the front side bus, Ultra-3 SCSI, the AGP bus, DDR SDRAM, and the HyperTransport bus on AMD's Athlon 64 X2 processors.

An alternative to double or quad pumping is to make the link self-clocking. This tactic was chosen by InfiniBand and PCI Express.

It is often difficult to know how to refer to the speed of a double-pumped bus. Some people talk about the speed of the clock signal while others refer to the number of transfers per second. It is less ambiguous to discuss the raw bandwidth of a bus as this also takes into account the width of the bus: thus DDR SDRAM that runs on a clock signal of 100 MHz, with data transfer the same as SDR SDRAM running at about 200 MHz, is called DDR-200 and PC-1600, referring to the bandwidth (see DDR SDRAM). However, this does not take into account the bus protocol overhead or latencies, both of which can reduce the effective bandwidth of a bus to a fraction of the raw bandwidth.