AMBA specification

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The Advanced Microcontroller Bus Architecture was introduced in 1996 and is widely used as the on-chip bus for ARM processors. The first AMBA buses were Advanced System Bus (ASB) and Advanced Peripheral Bus (APB). In its 2nd version, ARM introduced AHB that is a single clock-edge protocol. This protocol is today a de-facto standard for 32-bit embedded platforms because it is well documented and can be used without royalties. In 2003, ARM introduced the 3rd generation of AMBA including AXI high-performance interconnect. Some manufacturers utilize AMBA bus for non-ARM design. As example Infineon uses AMBA bus for the ADM5120 SoC based on the MIPS architecture.

AMBA is designed for use in System-on-a-chip (SoC) systems. The important aspect of a SoC is not which components or blocks it houses, but how they are implemented. AMBA is a solution for the blocks to interface with each other.

The AMBA 2.0 specification and AMBA 3 AXI specification define four buses/interfaces:

Advanced eXtensible Interface (AXI)
Advanced High-performance Bus (AHB)
Advanced System Bus (ASB)
Advanced Peripheral Bus (APB)

The timing aspects of the bus and the voltage on the bus are not specified in the specifications.

The objective of the AMBA specification is to

be technology independent
to enhance design reusability using IP cores
encourage modular system design to improve processor independence
minimalize silicon infrastructure

[edit] PrimeCell

The PrimeCell Peripherals are AMBA bus-compliant, synthesizable intellectual property (IP) cores developed by ARM for SoC integration. The PrimeCell Peripherials family includes UARTs (PL010, PL011), SDRAM and FLASH memory controllers (PL172), DMA engines e.t.c.