Zilog Z280

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The Zilog Z280 is an enhanced version of the Zilog Z80 with a 16 bit architecture, introduced in July 1987. It added a memory management unit (MMU) to expand addressing to 16Mb, features for multitasking, a 256 byte cache, and a huge number of new opcodes (giving a total of over 2000). Its internal clock signal runs at 2 or 4 times the external clock's speed (e.g. a 16MHz CPU with a 4MHz bus).

This article was originally based on material from the Free On-line Dictionary of Computing, which is licensed under the GFDL.

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