Talk:Test-and-set
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The article previously had a paragraph that said
"However, in multiprocessor systems, it is impossible and undesirable to disable interrupts on all processors at the same time; and even with interrupts disabled, two or more processors could be attempting to access the same semaphore's memory at the same time. The test-and-set instruction, allows any processor to atomically test and modify a memory location, preventing such multiple processor collisions. The processor should still disable its interrupts, as in a uniprocessor system, before executing a test-and-set, to prevent a deadlock if another process running on this processor also accesses that semaphore."
I'm pretty sure that last sentence is incorrect, so I deleted it. My understanding is that the test-and-set assembly language instruction cannot be interrupted by any interrupts, including the one that causes a test-switch to another thread running on this processor. Please tell me if that last sentence was correct for any processor. -- DavidCary 05:36, 3 May 2004 (UTC)
It seems a little redundant to have mostly the same text at compare-and-swap -- should we combine them somehow ?
Seems redundant to me too. Test-and-set effectively swaps value in memory with true. If observed from memory bus both do same operations atomically: one read and one write. Main difference in actual CPU instruction test-and-set is that it also sets CPU condition codes accroding the value read from memory (zero or non-zero). I vote for a combination where we first describe atomic swap and then the 'fine graned' version test-and-set. --Jyke 11:55, 17 Jun 2005 (UTC)
Test-and-set should not be merged with compare-and-swap. The two are different. Test-and-set does not always just check for equality and swap if not. Other, more sophisticated tests are possible, such as "if i < 17 then i = 28".
Also, please note that the texts of the two pages are no longer similar.
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