STI (x86 instruction)
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In the x86 assembly language, the STI instruction is a mnemonic for SeT Interrupts. It sets the interrupt flag (IF) in the EFLAGS register to one, which enables the reception of maskable interrupts by the processor. The CLI instruction is the inverse of the STI instruction.
[edit] Overview
The STI instruction exhibits the same behavior as a memory barrier. Therefore, it may also be used as a general cache and instruction stream synchronization mechanisim.
Software interrupts, generated by the INT instruction, will be serviced irrespective of the value of IF.
One interesting quirk about the STI instruction is that interrupts are not actually enabled until after the instruction immediately following the STI. One side effect of this is that if IF=0, then executing a CLI instruction immediately after an STI instruction means that interrupts are never recognized. The STI instruction sets the IF flag, but interrupts are not checked for until after the next instruction which in this case would be the CLI which takes effect immediately. This behavior typically is not important except perhaps for real-time system developers. See IA-32 manuals for details.
