Silicon on insulator

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Silicon on insulator (SOI) is a layered structure consisting of a thin layer of silicon, from 50 nm to 100 µm, which is created on an insulating substrate, which is usually sapphire or silicon with an insulating layer of silicon dioxide (SiO2) 80 nm to 3 µm thick on its surface. This process reduces the amount of electrical charge that the transistor has to move during a switching operation, increasing speed (up to 15%) and reducing switching energy (up to 30%) over CMOS-based chips. SOI chips cost more to produce and are generally used for high-end applications.

A popular SOI technology is Silicon on sapphire (SOS), used for special radiation hardening applications in the military and aerospace industries.

SOI differs from generic CMOS in that its silicon junction is above an electrical insulator. The advantage is that this insulator reduces the capacitance, meaning the transistor has less to charge-up before completing a switch, which results in reduced switching time. SOI devices are usually inherently latchup resistant. Also, there is a reduction in transistor leakage current thereby making this fabrication technology an attractive choice for low power circuit design.

SOI wafers are produced by one of two main methods:

  • SIMOX - Separation by IMplantation of OXygen - uses an oxygen ion beam implantation process followed by high temperature annealing to create a buried SiO2 layer.
  • Smart Cut™ is another method developed by the French firm Soitec that bonds the oxidized surface of two wafers together and then splits most of the top wafer away along a band of implanted hydrogen bubbles. The thin layer of silicon that is left behind is isolated from the substrate by what was originally the surface oxide layers.

[edit] Use in industry

The need to minimize the static and dynamic power of transistors has made SOI one of the cornerstone technologies of modern digital integrated circuit manufacturing. SOI technology is utilized by many major microprocessor manufacturers including IBM, AMD, and Chartered Semiconductor.

Intel also uses a form of SOI technology called "high-k" which places a layer of silicon with a high dielectric constant between the gate and silicon substrate.

[edit] See also

Dual Stress Liner

[edit] External links

  • AMDboard - a site with extensive information regarding SOI technology