Rock processor

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For other uses of "Rock", see Rock (disambiguation).
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It may contain preliminary or speculative information, and may not reflect the final version of the product.

Rock is planned multithreading, multicore microprocessor currently in development at Sun Microsystems. It will implement 64-bit (v9) SPARC instruction set. The Rock processor targets traditional high-end data facing workloads such as backend databases, as well as floating-point intensive high-performance computing workloads. The Rock will provide four cores, with each core having four separate processing engines. Each processing engine is capable of running two threads simultaneously, yielding 4 x 4 x 2 = 32 threads per chip. Each core also has four floating point/graphics units. Each group of four processing engines is expected to share 32KB of L1 instruction cache and 32KB of L1 data cache, yielding 4 x 2 = 8 cache stores per chip.[1] Servers built with Rock will use FB-DIMM's which can be used to increase reliability, speed and density of memory systems. The Rock processor is planned for a 65nm manufacturing process.[2] Sun expects to ship servers with the Rock processor starting in 2008.[3] [4]

Sun has publicly disclosed a feature in the Rock processor called "Hardware Scout". Hardware Scout uses otherwise idle chip execution resources to perform prefetching during cache misses. [5]

In March 2006, Marc Tremblay, Vice President and Chief Architect for Sun's Scalable Systems Group, gave a presentation at the Xerox Palo Alto Research Center (PARC) on Thread-level parallelism, Hardware Scouting, and Thread-level speculation.[6] These multithreading technologies are expected to be included in the Rock processor.

[edit] References

  1. ^ Vance, Ashlee (March 14, 2006). Sun's Rock goes 16 cores and arrives with multi-core friends. The Register.
  2. ^ Neal, Brian (March 24, 2003). Architecting the Future: Dr. Marc Tremblay. Ace's Hardware.
  3. ^ Niccolai, James. "Sun adds Rock to its UltraSparc road map", Computer World, February 12, 2004.
  4. ^ Niccolai, James. "The Multicore Advantage", Sun Microsystems, September 2, 2005.
  5. ^ Chaudhry, S., S. Yip; P. Caprioli; M. Tremblay (2005). "High Performance Throughput Computing". IEEE Micro 25 (3).
  6. ^ Tremblay, M. (March 2, 2006). "High Performance Throughput Computing". PARC Forum.

[edit] See Also

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