Quad Data Rate SDRAM
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DRAM types |
Quad Data Rate (QDR) SDRAM is a type of computer memory, more specifically a type of synchronous dynamic random-access memory, that can transfer four words of data in each clock cycle. Like Double Data-Rate (DDR) SDRAM, QDR SDRAM transfers data on both rising and falling edges of the clock signal. Unlike DDR SDRAM, which has a single bidirectional read-write port, QDR has separate read and write ports that can operate simultaneously. This requires a larger number of wires from the memory device to the memory controller, but doubles the theoretical maximum data transfer rate. QDR SDRAM uses two clocks, one for read data and one for write data.
Contents |
[edit] I/O
[edit] Clock Inputs
4 clock lines
- K
- not: /K
- C
- C not, /C
[edit] Control Inputs
2 control lines
- Write enable-not: /WPS
- Read enable-not: /RPS
[edit] Busses
one address bus and 2 data busses
- Address bus
- Data in bus
- Data out bus
[edit] Clocking Scheme
- Addresses
- Read address latched on rising edge of K
- Write address latched on rising edge of /K
- Data
- Write
- If /WPS is low
- A data word on Data In is latched on rising edge of K
- The next data word on Data In is latched on rising edge of /K
- If /WPS is low
- Read
- A read is a two cycle process
- If /RPS is low
- The first rising edge of K latches the read address, A
- The second rising edge of K puts the data word, from address A, on the Data Out bus
- The next rising edge of /K puts the next data word, from address A+1, on the Data Out bus
- Write
[edit] External Links
- http://www.qdrsram.com
- Quad Data Rate SRAM Clocking Scheme Cypress
- Quad Data Rate Description Electronic design Artical