POWER5

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POWER5 MCM with four processors and four 36 MB external L3 cache modules.
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POWER5 MCM with four processors and four 36 MB external L3 cache modules.
Processor module from a IBM i5 system, containing a POWER5+ DCM.
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Processor module from a IBM i5 system, containing a POWER5+ DCM.

POWER5 is a microprocessor developed by IBM. It is an improved variant of the highly successful POWER4. The principal changes are support for Simultaneous multithreading (SMT) and an on-die memory controller. Each CPU supports 2 threads; since it is a multicore chip, with 2 physical CPUs, each chip supports 4 logical threads. The POWER5 can be packaged in a DCM (dual chip module), with one dual core chip per module, or an MCM with 4 dual core chips per module. POWER5+ (presented on 3Q 2005) packages in QCM, 2 dual core chips.

Serveral POWER5 processors in high end systems can be coupled together to act as a sincle vector processor by a technology called ViVA, Virtual Vector Architecture.

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