Interrupt vector table

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An interrupt vector table is a table of interrupt vectors that associates an interrupt handler with an interrupt request in a machine specific way. A dispatch table is one method of implementing an interrupt vector table.

When the CPU is interrupted by an interrupt, it looks up the interrupt handler in the interrupt vector table, and transfers control to it.

The simplest way to understand an interrupt vector table is to compare it directly to a vector table. A vector can be mathematical, pathological, or genetical. In computing it's easiest understood that a vector table is described as a course or direction, as of an airplane. When air-traffic control assigns a vector to an airplane, the controller is essentially pointing the pilot in a certain direction. Likewise, the interrupt vector table will tell an operating system where to look to find a particular set of interrupts.

When we use one thing to point to something else, we're directing traffic. Web sites often use one URL to redirect the browser to another address (see: URL redirection). An operating system uses vector tables to send instructions to other (typically memory) addresses.

Mathematically a vector is described as having magnitude and direction. Practically, you can apply this to an interrupt vector table by describing the address (or address length) as its magnitude, and its location as a direction within the table (see below).


For example, an interrupt vector table on the x86 architecture, known as the interrupt descriptor table, holds the memory locations of interrupt handlers. In Real Mode, the table resides at a fixed location in memory from address 0000h to 0400h, and consists of 256 4-byte real mode pointers (256 * 4 = 1024 bytes of memory). A real mode pointer is defined as a 16 bit segment address and a 16 bit offset into that segment. A segment address is expanded internally by the processor to 20 bits thus limiting real mode interrupt handlers to the first 1 Megabyte of addressable memory. The first 32 vectors are reserved for the processor's internal exceptions, and hardware interrupts may be mapped to any of the vectors by way of a programmable interrupt controller.

A commonly used x86 Real Mode interrupt is 0x10, the VGA BIOS code to handle primitive screen drawing functions.


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