IBM 1401
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The IBM 1401, the first member of the IBM 1400 series, was a variable wordlength decimal computer that was announced by IBM on October 5, 1959. It was withdrawn on February 8, 1971.
From the IBM Archives:
- The following is the text of an IBM Data Processing Division press fact sheet distributed on October 5, 1959.
- The all-transistorized IBM 1401 Data Processing System places the features found in electronic data processing systems at the disposal of smaller businesses, previously limited to the use of conventional punched card equipment. These features include: high speed card punching and reading, magnetic tape input and output, high speed printing, stored program, and arithmetic and logical ability.
- The 1401 may be operated as an independent system, in conjunction with IBM punched card equipment, or as auxiliary equipment to IBM 700 or 7000 series systems.
The IBM 1401 was also commonly used as an off-line peripheral controller in many installations of both large "Scientific Computer"s and large "Business Computer"s. In these installations the big computer (e.g., an IBM 7090) did all of its input-output on magnetic tapes and the 1401 was used to format input data from other peripherials (e.g., the punch card reader in the IBM 1402 card reader/punch) on the tapes and transfer output data from the tapes to other peripherals (e.g., the punch card punch in the IBM 1402 card reader/punch or the IBM 1403 lineprinter).
During its lifetime about 20,000 total systems were manufactured (photo), making the IBM 1401 one of IBM's most successful products. From the IBM Archives:
The monthly rental for a 1401 was $2,500 and up, depending on the configuration. By the end of 1961, the number of 1401s installed in the United States alone had reached 2,000 -- representing about one out every four electronic stored-program computers installed by all manufacturers at that time. The number of installed 1401s peaked at more than 10,000 in the mid-1960s, and the system was withdrawn from marketing in February 1971.
Elements within IBM, notably John Haanstra, an executive in charge of 1401 deployment, supported its continuation in larger models for evolving needs but the 1964 decision at the top to focus resources on the System/360 ended these efforts rather suddenly. To preserve customer investment in 1401 software, IBM pioneered the use of microcode emulation, in the form of ROM, so that some System/360 models could run 1401 programs. Such emulation continued well into the modern era... in some cases, perhaps, until Y2K efforts caused the still-running 1401 code to be rewritten.
During the 1970s, many installations in India used the 1401 and some of today's Indian software entrepreneurs started on this machine.
A 1401 Restoration Project is in process at the Computer History Museum in Mountain View, California, complete with the old "false floor" of the mainframe era, used to hide cabling[1].
Contents |
[edit] Architecture
Although described as a (BCD) computer, each byte (or alphameric character) in the 1401 was represented by six bits, called A, B, 8, 4, 2 and 1. The A and B bits were called zone bits and the 8, 4, 2 and 1 bits were called numeral or BCD bits. Associated with each six-bit byte were two other bits, called C for odd parity check and M for wordmark, in the following format:
C B A 8 4 2 1 M
The 1401 was available in five memory configurations: 1.4K[2], 2K, 4K, 8K, or 16K (a very small number of 1401s were expanded to 32K by special RPQ - Request for Price Quotation). An optional "Advanced Programming Option" allowed for additional flags for 3 bytes within the first 100.
An IBM 1401 core memory address consisted of three six-bit bytes. The decimal address within 000 to 999 was specified by the BCD bits of the address. Addresses that did not contain valid BCD codes in these bits caused a hard halt. The A and B bits of the high-order byte specified an increment, A 1000, B 2000, A and B 3000, giving an addressability of 4,000 bytes in all. The zone bits of the low-order byte specified increments of 4000, 8000, or 12000, to address 16,000 bytes (with an IBM 1406 memory expansion unit). The zone bits of the middle byte were used to specify index registers, one of many optional features.
Instructions were of six lengths (1, 2, 4, 5, 7, 8). One-byte instructions consisted of only an opcode. These were either defined as one-byte instructions or were chained instructions, using the addresses left by the previous instruction when it completed. Two-byte instructions consisted of an opcode and a modifier byte. Four-byte instructions consisted of an opcode followed by an address, five byte instructions an opcode, address and modifier byte, seven byte instructions an opcode followed by two addresses, and eight byte instructions an opcode, two addresses and a modifier byte.
Instructions were only valid if the wordmark was set on the low-order (opcode) byte and nowhere else in the instruction. Instruction fetching stopped and execution began when another byte with the wordmark set was encountered (the valid opcode byte of the next instruction); there were two exceptions to this rule:
- The dyadic SET WORDMARK instruction, which set two wordmarks, is seven bytes even without a following valid opcode.
- The unconditional BRANCH INDICATOR instruction, is five bytes even without a following valid opcode.
- Note: Other than these two exceptions, if no valid opcode was found by the 9th byte, the instruction was treated as an 8 byte instruction, but the computer continued scanning for a valid opcode (ignoring the bytes) until one was found before beginning execution or an error was detected (e.g., the end of memory). This was usually considered sloppy programming but not necessarily an error.
When the LOAD button on the IBM 1402 reader/punch was pressed, a card was read into the card read buffer (core locations 1-80), a wordmark was set in location 1 (validating the first instruction on the card), and clearing the wordmarks in locations 2-80. Thus, the first instruction of any bootstrap program was a dyadic set wordmark, which validated two other instructions. In practice, the first few cards of a card-deck bootstrap program would consist entirely of dyadic set wordmark instructions, no-op instructions, and a "read card and branch" instruction, which would set up a pattern of wordmarks in the card read buffer. The "read card" instruction did not change any wordmarks in the card read buffer. By use of no-op instructions of various lengths, the next few cards would conform to this pattern of wordmarks.
[edit] Software
Software on the 1401 included:
- Autocoder a more advanced assembler, required at least 4K memory locations.
- FARGO (Fourteen-o-one Automatic Report Generation Operation), a predecessor of RPG, required 4K.
- FORTRAN II was available for systems containing at least 8K memory locations; the 1401 Fortran compiler is described in Haines, L.H. (1965), below. The Fortran compiler, to generate code for small memories, used a pioneering form of interpreted "p-code" although, of course, its programmers had no name for what it is that they did.
- FORTRAN IV was available for systems containing at least 8K memory locations and either 4 tape drives or 1 IBM 1311 disk drive.
- RPG (Report Program Generator) The only high-level language in common use, RPG was a declarative language primarily for specifying accounting reports and is still in use on IBM's midrange AS/400. Basic RPG required at least 4K memory locations.
- Symbolic Programming System, SPS-1 and SPS-2, assemblers[3]. SPS-1 could run on a low end machine with 1.4K memory locations, SPS-2 required at least 4K memory locations.
For the IBM Catalog of 1401 sofware, see IBM 1400 series.
[edit] Character and Op codes
The table below is listed in Character Collating Sequence. Note: If Wordmark bit is set, then the C bit will be opposite of shown.
BCD Character | Print-A | Print-H | Card | BCD w/o W |
Operation | Definition & Notes |
---|---|---|---|---|---|---|
Blank | C | |||||
. | . | . | 12-3-8 | BA8 21 | Halt | |
¤ | ¤ | ) | 12-4-8 | CBA84 | Clear Word Mark | Lozenge |
[ | 12-5-8 | BA84 1 | ||||
< | 12-6-8 | BA842 | Less Than | |||
| 12-7-8 | CBA8421 | Group Mark | |||
& | & | + | 12 | CBA | ||
$ | $ | $ | 11-3-8 | CB 8 21 | ||
* | * | * | 11-4-8 | B 84 | ||
] | 11-5-8 | CB 84 1 | ||||
; | 11-6-8 | CB 842 | ||||
Δ | 11-7-8 | B 8421 | Delta (Mode Change) | |||
- | - | - | 11 | B | ||
/ | / | / | 0-1 | C A 1 | Clear Storage | |
, | , | , | 0-3-8 | C A8 21 | Set Word Mark | |
% | % | ( | 0-4-8 | A84 | Divide | Optional special feature. |
ˠ | 0-5-8 | C A84 1 | Word Separator | |||
\ | 0-6-8 | C A842 | Left Oblique | |||
⧻ | 0-7-8 | A8421 | Tape Segment Mark | |||
ƀ | ‡ | ‡ | N/A 0 |
A | Cannot be read from card. Punches as zero. Blank with "even-parity" on tape. |
|
# | # | = | 3-8 | 8 21 | Modify Address | Optional (requires more than 4000 characters of memory) |
@ | @ | ' | 4-8 | C 84 | Multiply | Optional special feature. |
: | 5-8 | 84 1 | ||||
> | 6-8 | 842 | Greater Than | |||
√ˉ | 7-8 | C 8421 | Tape Mark | |||
? | & | & | 12-0 | CBA8 2 | Zero and Add | Plus Zero |
A | A | A | 12-1 | BA 1 | Add | |
B | B | B | 12-2 | BA 2 | Branch | |
C | C | C | 12-3 | CBA 21 | Compare | |
D | D | D | 12-4 | BA 4 | Move Numerical | (Bits) |
E | E | E | 12-5 | CBA 4 1 | Move Characters and Edit | |
F | F | F | 12-6 | CBA 42 | Control Carriage | (Printer) |
G | G | G | 12-7 | BA 421 | ||
H | H | H | 12-8 | BA8 | Store B-Address Register | Optional special feature. |
I | I | I | 12-9 | CBA8 1 | ||
! | - | - | 11-0 | B 8 2 | Zero and Subtract | Minus Zero |
J | J | J | 11-1 | CB 1 | ||
K | K | K | 11-2 | CB 2 | Select Stacker | (Card) |
L | L | L | 11-3 | B 21 | Load Characters to Word Mark | |
M | M | M | 11-4 | CB 4 | Move Characters to Word Mark | |
N | N | N | 11-5 | B 4 1 | No Operation | |
O | O | O | 11-6 | B 42 | ||
P | P | P | 11-7 | CB 421 | Move Characters to Record or Group Mark |
Optional special feature. |
Q | Q | Q | 11-8 | CB 8 | Store A-Address Register | Optional special feature. |
R | R | R | 11-9 | B 8 1 | ||
‡ | ‡ | ‡ | 0-2-8 | A8 2 | Record Mark | |
S | S | S | 0-2 | C A 2 | Subtract | |
T | T | T | 0-3 | A 21 | ||
U | U | U | 0-4 | C A 4 | Control Unit | (Tape) |
V | V | V | 0-5 | A 4 1 | Branch if Word Mark and/or Zone |
|
W | W | W | 0-6 | A 42 | Branch if Bit Equal | Optional special feature. |
X | X | X | 0-7 | C A 421 | Move and Insert Zeros | Optional special feature. |
Y | Y | Y | 0-8 | C A8 | Move Zone | (Bits) |
Z | Z | Z | 0-9 | A8 1 | Move Characters and Suppress Zeros |
|
0 | 0 | 0 | 0 | C 8 2 | ||
1 | 1 | 1 | 1 | 1 | Read a Card | |
2 | 2 | 2 | 2 | 2 | Write a Line | |
3 | 3 | 3 | 3 | C 21 | Write and Read | |
4 | 4 | 4 | 4 | 4 | Punch a Card | |
5 | 5 | 5 | 5 | C 4 1 | Read and Punch | |
6 | 6 | 6 | 6 | C 42 | Write and Punch | |
7 | 7 | 7 | 7 | 421 | Write, Read, and Punch | |
8 | 8 | 8 | 8 | 8 | Start Read Feed | Optional special feature. |
9 | 9 | 9 | 9 | C 8 1 | Start Punch Feed | Optional special feature. |
[edit] Hardware implementation
Most of the logic circuitry of the 1401 was a type of diode-transistor logic (DTL), that IBM referred to as CTDL. Other IBM circuit types used were referred to as: Alloy (some logic, but mostly various non-logic functions, named for the kind of transistors used), CTRL (a type of resistor-transistor logic (RTL)). Later upgrades (e.g., the TAU-9 tape interface) used a faster type of DTL using "drift" transistors (a type of transistor invented by Herbert Kroemer in 1957) for their speed, that IBM referred to as SDTDL. Typical logic levels of these circuits were (S & U Level): high – 0V to -0.5V, low – -6V to -12V; (T Level): high – 6V to 1V, low – -5.5V to -6V.
These circuits were constructed of individual discrete components mounted on single sided paper-epoxy printed circuit boards either 2.5 by 4.5 inches (38 by 114 mm) with a 16 pin gold plated edge connector (single wide) or 5.375 by 4.5 inches (82 by 114 mm) with two 16 pin gold plated edge connectors (double wide), that IBM referred to as SMS cards (Standard Modular System). The amount of logic on one card was similar to that in one 7400 series SSI or simpler MSI package (e.g., 3 to 5 logic gates or a couple of flip-flops on a single wide card up to about 20 logic gates or 4 flip-flops on a double wide card).
These boards were inserted in sockets on racks, that IBM referred to as gates.
[edit] Art Inspired by IBM 1401
In 2006, respected indie label 4AD (The Pixies, Dead Can Dance, Scott Walker) will put out an album by Icelandic avante-garde musician, Jóhann Jóhannsson. The album is called 'IBM 1401, A User's Manual'. The concept is based upon work his father, Jóhann Gunnarsson, did back in 1964 as chief maintenance engineer of one of the country’s first computers. The album was originally written for a string quartet, organ and electronics and to accompany a dance piece by long-standing collaborator friend, Erna Ómarsdóttir. For the album recording, Johann has rewritten it for a sixty-piece string orchestra, adding a new final movement and incorporating electronics and vintage reel-to-reel recordings of a singing IBM 1401 mainframe computer found in his father’s attic. The result is quite astonishing. Link to an mp3 from the album
[edit] References
- IBM (April, 1966). IBM 1401 System Summary. A24-1401-1. Brief descriptions of the machine features, componets, configurations, and special features
- IBM (April, 1962). IBM 1401 Data Processing System: Reference Manual. A24-1403-5.
[edit] External links
- IBM 1401 documents on bitsavers.org
- IBM Archives, 1401 Data Processing System
- IBM 1401 videos and sounds
- 1401s I have Known, Tom Van Vleck
- Haines, L. H. (1965). "Serial compilation and the 1401 FORTRAN compiler". IBM Systems Journal 4 (1): 73-80.. This article was reprinted, edited, in both editions of Lee, John A. N. (1967(1st), 1974(2nd)). Anatomy of a Compiler. Van Nostrand Reinhold.
- Official 4AD page for Johann Johannsson's concept album "IBM 1401: A User's Manual"
[edit] Notes
- ^ 1401 Restoration Project.
- ^ K is used in this article for 1000, not 1024.
- ^ The History of Programming Languages: SPS web page has, at the bottom, the assertion, attributed to Ray Saunders, that SPS was "was field-written by IBM CEs and SEs".