Frequency divider
From Wikipedia, the free encyclopedia
A frequency divider is a electronic circuit that takes an input signal with a frequency, fin, and generates an output signal with a frequency:
where n is an integer. There are several different ways of implementing a frequency divider whether it is for analog or digital applications. In the analog case a regenerative frequency divider can be implemented using a feedback loop. This approach is known as the Miller Frequency Divider [1]. For digital signals, a pair of cross-coupled D flip-flops can be used [2], or an inverter ring with transmission gates [3] [4].
[edit] Frequency dividers in electronics
Frequency dividers are constructed using a series of bistable multivibrators. The output of the first bistable is fed into the clock input of the next, the number of bistables used increases with the number you wish to divide by:
- Division by even numbers is performed using D-Type flip-flops.
- Division by odd numbers is performed by JK-Type flip-flops.
[edit] References
- ^ R. L. Miller (1939). "Fractional Frequency Generators Utilizing Regenerative Modulation". Proceedings of The IRE: 446–457.
- ^ B. Razavi et al (1994). "A 13.4 GHz CMOS Frequency Divider". IEEE Int. Solid-State Circuits Conference: 176–177.
- ^ C. E. Saavedra (May 2005). "A Microwave Frequency Divider using an Inverter Ring and Transmission Gates". IEEE Microwave and Wireless Components Letters 15 (5): 330–332.
- ^ M. Kuriso et. al (1997). "An 11.8-GHz 31-mW CMOS Frequency Divider". IEEE Symp. VLSI Circuits: 73–74.