Talk:Fanout

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To whoever wrote this article...you have my thanks. I have been trying to detirmine the number of possible fanouts in CMOS for sometime and have not seen it listed in major texts (R.J. Baker - Katz & Borriello). Is there anyone who might point me in the direction of a contemporary text that I could use to cite the 50 to 100 possible fanout lines possible with today's CMOS technology? I am writing a white paper and this would be very useful. Once again...this information already helps me conceptually. Thanks!

The article is kinda wrong anyway. unlike with TTL, CMOS fanout is almost entirely frequency dependant (at DC its in the tens of thousands iirc). Plugwash 11:09, 11 August 2006 (UTC)

Tens of thousands huh... would this be possible at ULSI scales? Do you know of a good textbook or journal that contains this information? Thanks for your help. Mareschal

well i just did a little bit of checking looking at http://www.nxp.com/acrobat/various/HEF_FAMILY_SPECIFICATIONS.pdf and taking the figures for 15V (since thats the only voltage at which they specify the maximum input current) and using figures for 25 celcius the fanout would be
Fanout = \lfloor\frac{I_{out}}{I_{in}}\rfloor = \lfloor\frac{3.4*10^-3}{0.1*10^-6}\rfloor = 34000
it would be interesting to compare other CMOS families but they would all almost certainly fall into the realm of thousands at least at room temperature and hundreds even at extremely high temperature. However in reality it doesn't matter because you would never implement a system with thousands of gates unless you needed it to be fast (you'd just do it in software instead) and for fast cmos circuits there is no fixed fanout but instead a tradeoff between fanout and propogation delay. Plugwash 23:49, 12 August 2006 (UTC)

Appreciate your help! Mareschal