Carry select adder
From Wikipedia, the free encyclopedia
In electronics, an adder is a combinatorial or sequential logic element which computes the n-bit sum of two n-bit numbers. The carry-select adder is simple but rather fast, having a gate level depth of 
.
Adding two n-bit numbers is performed by breaking the input into blocks. For each block, sum and carry values are pregenerated for either possible carry input to the block. This phase uses a ripple-carry adder. The actual carry-out value is then fed into a multiplexer that picks the correct sum and carry-out for the next block.
The block size can be uniform, or variable for each block. In the former case, the optimal delay occurs for a block size of 
. In the latter, the block size should be 1-bit for the least-significant block, 2-bits for the next one, and so on. In both cases, the gate delays of the two phases are equal and the total gate delay is minimal.
 |
This computer hardware-related article is a stub. You can help Wikipedia by expanding it. |
