Athlon 64 X2

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Athlon 64 X2 E6 3800+
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Athlon 64 X2 E6 3800+

The Athlon 64 X2 is the first dual-core desktop CPU manufactured by AMD. It is essentially a processor consisting of two Athlon 64 cores joined together on one die with some additional control logic. The cores share one dual-channel memory controller, are based on the E-stepping model of Athlon 64 and, depending on the model, have either 512 or 1024 KiB of L2-Cache per core. The X2 is capable of decoding SSE3 instructions (except those few specific to Intel's architecture), so it can run and benefit from software optimizations that were previously only supported by Intel chips. This enhancement is not unique to the X2, and is also available in the Venice and San Diego single core Athlon 64's. AMD officially started shipping the Athlon 64 X2 at Computex, on 1 June 2005.

[edit] Multithreading

The main benefit of dual core processors like the X2 is their ability to process more software threads at the same time. The ability of processors to execute multiple threads simultaneously is called thread-level parallelism (TLP). By placing two cores on the same die, the X2 effectively doubles the TLP over a single core Athlon 64 of the same speed. The need for TLP processing capability is dependent on situation to a great degree, and certain situations benefit from it far more than others. Certain programs are currently only written with one thread, and are therefore unable to utilize the processing power of the second core.

Programs often written with multiple threads and capable of utilizing dual cores include many music and video encoding applications, and especially professional rendering programs. High TLP applications currently correspond to server/workstation situations more than the typical desktop. These applications can realize almost twice the performance of a single core Athlon 64 of the same specifications. Multi-tasking also runs a sizable number of threads; intense multi-tasking scenarios have actually shown improvements of considerably more than two times [1]. This is primarily due to the excessive overhead caused by constantly switching threads, and could potentially be improved by adjustments to operating system scheduling code.

Further information: Multi-core (computing)

[edit] Manufacturing costs

Having two cores, the Athlon 64 X2 has an increased number of transistors. The 1 MiB L2 cache X2 processor has 233.2 million transistors [2] whereas its Athlon 64 counterpart has only 114 million transistors [3]. As a result, a larger area of silicon must be defect free. These size requirements necessitate a more complex fabrication process, which further adds to the production of fewer functional processors per single silicon wafer. This lower yield makes the X2 more expensive to produce than the single core processor.

[edit] CPU Cores

[edit] Toledo (90 nm SOI)

Dual-core CPU

  • CPU-Stepping: E6
  • L1-Cache: 64 + 64 KiB (Data + Instructions), per core
  • L2-Cache: 512 or 1024 KiB fullspeed, per core
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit
  • Socket 939, HyperTransport (1000 MHz, HT2000)
  • VCore: 1.35 V - 1.4 V
  • Power Consumption (TDP): 110 Watt max (4400+: 89 or 110 Watt depending on version)
  • First Release: 21 April 2005
  • Clockrate:: 2000 - 2400 MHz
    • 512 KiB L2-Cache:
      • 3800+: 2000 MHz
      • 4200+: 2200 MHz
      • 4600+: 2400 MHz
    • 1024 KiB L2-Cache:
      • 4400+: 2200 MHz
      • 4800+: 2400 MHz

[edit] Manchester (90 nm SOI)

Dual-core CPU

  • CPU-Stepping: E4
  • L1-Cache: 64 + 64 KiB (Data + Instructions), per core
  • L2-Cache: 512 KiB fullspeed, per core
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit
  • Socket 939, HyperTransport (1000 MHz, HT1000)
  • VCore: 1.35 V - 1.4 V
  • Power Consumption (TDP): 89 Watt max (4600+: 110 Watt max)
  • First Release: 1 August 2005
  • Clockrate:: 2000 - 2400 MHz
    • 3800+: 2000 MHz (ADA3800DAA5BV)
    • 4200+: 2200 MHz (ADA4200DAA5BV)
    • 4600+: 2400 MHz (ADA4600DAA5BV)

[edit] Windsor (90 nm SOI)

Dual-core CPU

  • CPU-Stepping: F2
  • L1-Cache: 64 + 64 KiB (Data + Instructions), per core
  • L2-Cache: 256, 512 or 1024 KiB fullspeed, per core
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit, AMD Virtualization
  • Socket AM2, HyperTransport (1000 MHz, HT1000)
  • VCore: 1.30 V - 1.35 V
  • Power Consumption (TDP): 35 Watt (3800+ EE SFF), 65 Watt (3600+ to 4800+ EE) , 89 Watt max
  • First Release: May 23, 2006
  • Clockrate: 2000 MHz - 2600MHz
    • 256 KiB L2-Cache:
      • 3600+: 2000 Mhz
    • 512 KiB L2-Cache: (often mislabeled as Brisbane core)
      • 3800+: 2000 MHz
      • 4200+: 2200 MHz
      • 4600+: 2400 MHz
      • 5000+: 2600 MHz
    • 1024 KiB L2-Cache:
      • 4000+: 2000 MHz
      • 4400+: 2200 MHz
      • 4800+: 2400 MHz
      • 5200+: 2600 MHz

[edit] Brisbane (65 nm SOI)

Dual-core CPU

In the middle of June 2006 AMD stated that they will no longer make any non-FX Athlon 64 or Athlon 64 X2 models with 1MB L2 caches due to yield issues [4]. This led to only a small number of the Socket AM2 Athlon 64 X2 4000+, 4400+, and 4800+ models being produced. This leaves the Socket AM2 Athlon 64 X2 model line with only the 512KB L2 cache models: 3800+, 4200+, 4600+, and 5000+. Only model 3600+ has 256kb per core.

[edit] See also

[edit] External links